The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
Flash memory chips, which use charge storage devices, have become a dominant chip type for semiconductor-based mass storage devices. The charge storage devices are particularly suitable in applications where data files to be stored include music and image files. Charge storage devices, however, can sustain a limited number of write cycles after which the charge storage devices can no longer reliably store data.
A limited number of write cycles may be acceptable for many applications such as removable USB (universal serial bus) drives, MP3 (MPEG Layer 3) players, and digital camera memory cards. However, when used as general replacements for bulk nonvolatile storage in computer systems, a limited number of write cycles may not be acceptable.
Lower density flash devices, where a single bit is stored per storage cell, typically have a usable lifetime on the order of 100,000 write cycles. To reduce cost, flash devices may store 2 bits per storage cell. Storing 2 bits per storage cell, however, may reduce the usable lifetime of the device to a level on the order of 10,000 write cycles.
Flash devices may not have a long enough lifetime to serve as mass storage, especially where part of the mass storage is used as virtual memory paging space. Virtual memory paging space is typically used by operating systems to store data from RAM (random access memory) when available space in RAM is low. For purposes of illustration only, a flash memory chip may have a capacity of 2 GB (gigabytes), may store 2 bits per cell, and may have a write throughput of about 4 MB/s (megabytes per second). In such a flash memory chip, it is theoretically possible to write every bit in the chip once every 500 seconds (i.e., 2E9 bytes/4E6 bytes/s).
It is then theoretically possible to write every bit 10,000 times in only 5E6 seconds (1E4 cycles*5E2 seconds), which is less than two months. In reality, however, most drive storage will not be written with 100% duty cycle. A more realistic write duty cycle may be 10%, which may happen when a computer is continuously active and performs virtual memory paging operations. At 10% write duty cycle, the usable lifetime of the flash device may be exhausted in approximately 20 months. By contrast, the life expectation for a magnetic hard disk storage device typically exceeds 10 years.
FIG. 1 illustrates a functional block diagram of a conventional solid-state disk 100. The solid-state disk 100 includes a controller 102 and a flash memory 104. The controller 102 receives instructions and data from a host (not shown). When a memory access is requested, the controller 102 reads or writes data to the flash memory 104, and communicates this information to the host.
An area (or memory block) of the flash memory 104 may become unreliable for storage after the area has been written to or erased a predetermined number of times. This predetermined number of times is referred to as the write cycle lifetime of the flash memory 104. Once the write cycle lifetime of the flash memory 104 has been exceeded, the controller 102 can no longer reliably store data in the flash memory 104, and the solid-state disk 100 may no longer be usable.